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Elliptic Curve (ECC) Point Multiply Accelerator Core

General Description

Elliptic Curve Cryptography (ECC) is a public-key cryptographic technology that uses the mathematics of so called “elliptic curves” and it is a part of the “Suite B” of crypto algorithms approved by the NSA.
Since ECC requires fewer bits than RSA to achieve the same cipher strength, it is frequently used in embedded applications. The operations necessary for the ECC cannot be efficiently implemented on an embedded CPU, however, typically requiring hundreds of milliseconds of the CPU time for signature verification.
ECC1-PM implements by far the most time-consuming operation of the ECC cryptography: so called “point multiplication” to enable low-power operation of the battery-powered devices.
The design is fully synchronous and available in multiple configurations varying in bus widths, set of elliptic curves supported and throughput.

Key Features

Small size: ECC1-PM starts from less than 10K ASIC gates (intermediate result storage memory required; size depends on the core configuration)
Implements the computationally demanding parts of ECC public key cryptography for long life battery powered applications
Support for ECC binary fields 2163, 2233, 2283, 2409, and 2571
Microprocessor-friendly interface
Test bench provided
Secure communications systems
Implantable medical devices
Digital Rights Management (DRM) for battery powered electronics
Elliptic Curve Diffie-Hellman (ECDH) standard ANSI X9.63
Elliptic Curve Digital Signature Algorithm (ECDSA) standards ANSI X9.62, NIST FIPS 186
B and K elliptic curves (163, 233, 283, 409, 571) defined by NIST
IEEE P1363 curves over binary fields GF(2m)
TLS implementations per RFC 4492
Cryptographic messaging per RFC 3278
Pin Description
CLK Input   Core clock signal
CEN Input   Synchronous enable signal. When LOW the core ignores all   its inputs and all its outputs must be ignored.
RESET Input   HIGH level asynchronously resets the core
READ Input   Read request for the input data byte
WRITE Input   Write signal for the interface
DONE Output   HIGH level indicates a completion of computation
D[ ] Input   Input Data
A[ ] Input   Address
Q[ ] Output   Output Data
Function Description
The core implements the Point Multiplication operation of the ECC cryptography Q = kP. The operands for the multiplication: k, Px, Py are programmed through the microprocessor interface. The curve parameters a/b are selected through the microprocessor interface and the calculation is started. Once the operation is complete, the result Qx, Qy can be read through the interface.

Export Permits
The core is subject to the US export regulations. See the IP Cores, Inc. licensing basics page, for links to US government sites and more details.

HDL Source Licenses

Synthesizable Verilog RTL source code
Software modules for a complete ECC implementation (optional)
Verilog testbench (self-checking)
Software modules test harness
Vectors for testbench and harness
Expected results
User Documentation

Netlist Licenses

Post-synthesis EDIF
Testbench (self-checking)
vectors for testbenches
Expected results
Contact Information
IP Cores, Inc.
3731 Middlefield Rd.
Palo Alto, CA 94303, USA
Phone: +1 (650) 815-7996
E-mail: info@ipcores.com