An RC4 keystream generator produces a keystream in 8-bit increments per ARC4 (ARCFOUR) specification.
A rising input on the START port triggers the beginning of a cryptographic operation, using the either the KEY or Sin inputs to initialize the keystream. In any case the old state is evacuated via the Sout pins. The core then starts to output the keystream per RC4 algorithm.
External circuitry can also pause the core by deasserting the QREADY pin, and has to read the keystream value off the Q output if QVALID is asserted.
The core continues to produce the keystream as long as START is kept high. To throttle the output, also at any time the CEN input can be brought low to pause the core.
A cryptographic operation can be aborted at any time by lowering the START signal for at least one clock cycle.