CLK |
Input |
Core clock signal |
Reset |
Input |
Core reset signal (active HIGH) |
Cen |
Input |
Synchronous enable signal. When LOW the core ignores all its
inputs and all its outputs must be ignored. |
GCMmode |
Input |
When HIGH, GXM3 mode is GCM, when LOW mode is XEX |
Encrypt |
Input |
When HIGH, core is encrypting, when LOW core is decrypting |
Key256 |
Input |
When HIGH, 256 bit AES key is used, when LOW – 128 bit
AES key |
EndC |
Input |
(GCM mode only) Marks last data block |
ZeroC |
Input |
(GCM mode only) Marks the block with zero length of plaintext/ciphertext
field |
NewIV |
Input |
(XEX mode only) Marks the last block of the data unit if followed
immediately by the first block of the next data unit with different
IV. |
Cts |
Input |
(XEX mode only) Marks the last full 128-bit block of the data
unit in case that the next block of this data unit is less than
128 bit (CTS mode) |
Start |
Input |
HIGH level starts the input data processing |
Read |
Output |
Read request for the input data byte |
Write |
Output |
Write signal for the output interface |
D[127:0] |
Input |
Input Data (other data bus widths
are also available)
- For GCM, additional authenticated data (AAD, A), followed
by the plain or
cipher text
- For XEX, plain or cipher text
|
K1[255:0] |
Input |
256 bit or 128 bit AES key (128-bit key uses K1[255:128] pins) |
K2[255:0] |
Input |
(XEX mode only) Tweak key (K2) (128-bit key uses K2[255:128]
pins) |
IV[127:0] |
Input |
(GCM mode only) Initial counter value (Y0, IV || 0311) |
lenA[63:0] |
Input |
(GCM mode only) Length of additional authenticated data in
bits |
be[3:0] |
Input |
Byte length of the last data block in bytes minus 1 |
FK[255:0] |
Output |
256 bit or 128 bit final round key (128-bit key uses FK[255:128]
pins) |
FKvalid |
Output |
HIGH when FK is valid |
Q[127:0] |
Output |
Output plain or cipher text |
T[127:0] |
Output |
(GCM mode only) Computed MAC (tag, T) |
Done |
Output |
HIGH when data processing is completed |