Generic |
Clk |
Input |
Core clock signal |
Rst |
Input |
Core reset signal |
Cen |
Input |
Synchronous enable signal. When LOW the core ignores all its inputs and all its outputs must be ignored. |
Start |
Input |
HIGH level starts the core operation
|
Configuration. The signals in this group typically have constant values during the core operation |
Encrypt |
Input |
When HIGH, core is encrypting, when LOW core is decrypting
|
offset[1:0] |
Input |
Confidentiality offset:
- 00 – 0 bytes
- 01 – 30 bytes
- 10 – 50 bytes
|
PNmax[31:0] |
Input |
Threshold for PN exhaustion. When PN for an SA > PNmax, PN exhausted is asserted |
PNwindow[31:0] |
Input |
Size of the PN window for replay protection |
strict |
Input |
Strict frame verification. When HIGH, Tx frames for which SC cannot be found are suppressed |
SCrequired |
Input |
If HIGH, Tx frames will include SCI |
ES |
Input |
If HIGH, Tx frames will have ES set |
directLLID |
Input |
If HIGH, LLID number is directly used as an index for the key lookup. If LOW, LLID is translated into key index using built-in associative storage. |
simple |
Input |
Support for non-MACsec legacy encryption mode |
Packet information. The signals in this group are to be asserted with the first or last word of the packet |
First |
Input |
Indicates the first word of a new packet on the D interface |
Last |
Input |
Asserted with the last word of the packet |
lsbC[3:0] |
Input |
Number of valid bytes in the last word |
E |
Input |
If HIGH, the packet shall be encrypted/decrypted |
C |
Input |
If HIGH, the packet shall be authenticated |
llid[14:0] |
Input |
LLID of the packet |
CPU interface |
mpA[9:0] |
Input |
Address |
mpD[31:0] |
Input |
Read data |
mpQ[31:0 |
Output |
Read data |
mpRead |
Input |
When HIGH, read operation |
myWrite |
Input |
When HIGH, write operation |
mpDvalid |
Output |
When HIGH, valid data are available on the RD bus |
mpQready |
Output |
When HIGH, CPU can write to the WD bus |
Datapath |
D[127:0] |
Input |
Input packet data: additional authenticated data (AAD, A), followed by the plain or cipher text |
Dvalid |
Input |
When high, data on the D bus is valid |
Dready |
Output |
When HIGH, core is ready to accept next data word on the D bus |
Q[127:0] |
Output |
Output encrypted or decrypted packet |
Qvalid |
Output |
When high, data on the Q bus is valid |
Qready |
Input |
When HIGH, external circuitry is ready to accept next data word on the Q bus |
Completion
signals. Asserted after the packet
processing |
done |
Output |
HIGH when data processing is completed, gate for the rest of completion signals |
PNexhausted |
Output |
On Tx: PN number for the last packet is too high, time to re-key |
Conly |
Output |
On Rx: The packet had C flag set and E clear. These packets require KaY processing |
noSecTag |
Output |
On Rx: The packet had no SecTag field (not a MACsec packet) |
SCunknown |
Output |
On Rx or Tx: Unable to locate an SC for the packet |
packetInvalid |
Output |
On Rx: Packet is not a proper MACsec frame |
packetLate |
Output |
On Rx: Packet PN is outside the PN window |
ICVmismatch |
Output |
On Rx: Packet authentication failed |
Memory interfaces |
memSA |
|
SA storage. For N SA, a single-port memory of 3N x 138 bits |
memStat |
|
(Only for statistics option) Statistics storage. For N SA, a single port memory of 12Nx64 bits |